Peer-reviewed paper
Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators
This work explores unary arithmetic for matrix multiplication in low-precision AI hardware. It studies how temporal unary representations change the area-power tradeoffs relative to more conventional arithmetic units.
Abstract Summary
This work explores unary arithmetic for matrix multiplication in low-precision AI hardware. It studies how temporal unary representations change the area-power tradeoffs relative to more conventional arithmetic units.
Research Context
This paper contributes to my research program in unary computing, matrix multiply, ISVLSI 2024. It is part of the broader work on efficient ML systems, hardware-software co-design, and deployment-aware computer architecture.